In an electrical device, the inversion function provided therein is to convert a DC voltage to an AC voltage. As shown in FIG. 1, a conventional half-bridge circuit is one of an inversion example among several other prior art circuit topologies, wherein a DC input voltage Vin provides a DC input current and is connected in parallel with a series connection of capacitors C1 and C2 and a series connection of switches Q1 and Q2, respectively, and a transformer T1 has a primary winding P1 connected between center nodes of the two series-connected capacitors (C1, C2) and switches (Q1, Q2). Alternative operation of the switches Q1 and Q2 results in the generation of an AC output voltage on a secondary winding S1 of the transformer T1.
Although the conventional half-bridge converter has low voltage stress on semiconductors, it suffers from twice the current ripple on the primary winding P1 due to one-half of the input voltage Vin applied to the primary winding P1 of the transformer T1. As a result, it generates higher di/dt (rate of current change) related electromagnetic interference (EMI) than that of the push-pull and full-bridge topologies.
To reduce input current-ripple with its related di/dt noises, interleaving two identical power converters to perform ripple cancellation is widely used at the cost of complicated circuit implementation. Moreover, the input current-ripple cancellation performance will be lost if the operating duty cycle is less than 0.5.
Therefore, it is desirable to design a half-bridge converter having near zero input current-ripple with minimum components. As shown in FIG. 2 is a circuit disclosed by the same inventor of the present invention. Three waveforms of currents Iin, IP1 and IC1 of the half-bridge converter shown in FIG. 1 and FIG. 2 are illustrated in FIG. 3(a) and FIG. 3(b), respectively. Due to the help of the two identical transformer primary windings P1, P2 and the clamping capacitor C3 (as shown in FIG. 2), a near zero input current-ripple is obtained as shown in FIG. 3(b). The current-ripple of the input current Iin is significantly reduced in comparison with that shown in FIG. 3(a). Consequently, the di/dt noise is reduced resulting in minimizing the input filter capacitor.
To take the advantage of lower voltage rating switch (MOSFET) accompanied with a lower RDS(on) (i.e. the resistance when MOSFET is turned-on), moreover, another circuit disclosed by the same inventor of the present invention is shown in FIG. 4. Two series-switch pairs Q3-Q1 and Q2-Q4 with respectively clamping diodes Dc1 and Dc2 are used to replace the two switches Q1 and Q2 shown in FIG. 2. Due to the turning on of the clamping diodes Dc1 and Dc2, the voltage on each switch is thus limited to one half of the input voltage Vin. Therefore, lower voltage rating switches can be used and the conduction losses are thus reduced. As a result, the efficiency of the converter is improved.
However, the clamping function is achieved only if a special control timing of each driver signal VGS1, VGS3, VGS2 or VGS4 (as shown in FIG. 4(b)) is provided by a control circuit (not shown) and the turn-off delay between VGS1-VGS3 or VGS2-VGS4 is required. As a result, it increases the complexity of the control circuit.
In addition to having near zero current-ripple performance, the present invention is directed to disclose inversion circuits and their corresponding rectification circuits with additional enhanced performances accordingly.